## About

In this post, I will talk about the ALU and the flags register of my 8-bit computer.

The arithmetical logical unit(ALU) is where all the computation happens in a computer. The ALU of this computer is very simple and only has the option to add or subtract numbers. So something like multiplication would have to be implemented in software.

The flags register stores the **Carry**(a carry occurs) and **Is Zero**(the result is a zero) flags that it receieves from the ALU.

## ALU

When bits from the A and B register arrive into the adder they are automatically added and the result is sent out of the **Sum **output. If the bits from both registers are 1 the **C_Out** output will be also set to 1. This output is thne feed into the C_In input of the next adder.

To implement the subtraction one of the values(B register) is XOR-ed and the carry in(**C_In**) of the first adder is set to 1. If you want to know how and why exactly this will perform subtraction(despite the fact that the bits are getting added) search more about “twos complement” or watch Ben Eaters video about it here.

Finally, there is a tristate buffer to control whether the value is put on the BUS or not.

### Adder Construction

- If
**A**and**B**are 0 the Sum and Carry should both be 0. - If
**A**or**B**is 1 the**Sum**is 1 and**Carry**is 0. - If both
**A**and**B**are 1 the**Sum**is 0 and**Carry**is 1.

- If

**Sum**output. And if you look at the truth table for the AND gate you can see that it matches the logic required for the

**Carry**output.

#### XOR Gate Truth Table

A | B | C |
---|---|---|

0 | 0 | 0 |

0 | 1 | 1 |

1 | 0 | 1 |

1 | 1 | 0 |

#### AND Gate Truth Table

A | B | C |
---|---|---|

0 | 0 | 0 |

0 | 1 | 0 |

1 | 0 | 0 |

1 | 1 | 1 |

**A**and

**B**). The second half-adder will add the sum output of the first half-adder and the carry bit from the previous full-adder(if present). It will then output the sum from the

**Sum**output. The carry bits from both half-adders are connected to the carry out(

**C_Out**) output through an OR gate.

### Flags Implementation

**C_Out**carry output of the Adder to the

**Cout**output of the ALU. For the

**IsZero**flag, we take the

**Sum**outputs of every adder and put them into a NOR gate. The output of the gate is then connected to the

**IsZero**output of the ALU.

## Flags Register

**IsZero**output of the ALU will output a 1 and when a carry occurs the

**Cout**output of the ALU will output a 1. The result of these outputs will get stored into the flags register. Thes flags can then be used in the control unit for the JMZ(jump if zero) and JMC(jump if carry) instructions. See more about the implementation of that in the control unit in this post.